ModelSim / Questa Core: Advanced Topics
ModelSim/Questa Core: Advanced Topics teaches you to capitalize on the extensive capabilities of ModelSim/Questa Core
You will learn how to effectively use ModelSim/Questa Core to effectively and efficiently analyze and debug digital HDL designs.
CONTENT I GOALS
Using various ModelSim/Questa Core features and techniques
Produce higher performance test benches
Produce more reliable device-under-test models
Develop a greater confidence in simulation thoroughness and completeness
Requirements: VHDL or Verilog knowledge I Duration: 2 days I Language: English / optional German I Price: upon request
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Dates
upon request
We are happy to offer further options such as live online sessions and on-site training upon request.
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Cadlog S.L.
C/Bahía de Pollensa, nº5
28042 - Madrid (España)
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